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INTERNETWORKING TECHNOLOGY HANDBOOK

DI SINI

Coret2 tentang UU ITE

ITE = Informasi dan Transaksi Elektronik

Jadi sekarang email, chat dan dokumen2 lain yang didapatkan dari dunia mayabisa menjadi evidence dalam bertransaksi.

Diundangkan 2008. Indonesia termasuk yang cepat mengaplikasikan UU ITE.

PP = presiden --> ngatur keseluruhan
PM = menteri --> ngatur internal departemen

UU ITE ini bisa menjadi anacaman dan peluang. Peluangnya tapi lebih banyak.
UU no 36 thn 99 --> telekomunikasi sudah diliberaralisasi. Kita bisa merambah ke broadcast dan perbankan.
Finnet = perkawinan antara telco dan perbankan
Telco skrg sudah menjadi ancaman bagi perbankan
Misal : e-voucher.
IPTV juga jadi ancaman bagi dunia broadcast. Kita akan mengeluarakan digital TV.

Undang-undang belum detail. Detailnya akan diturunkan di PP, PM, Kepdirjen, Perdirjen.
Untuk numbering ada di kepdirjen.
That's why UU ITE ini sangat strategis.

MATERI UNDANG-UNDANG ITE
Berlaku di indonesia dan di luar indonesia
Berlaku bagi semua orang

IE dan DE menjadi alat bukti yang sah!

Sertifikasi keandalan mirip2 sertifikat halal MUI atau BPOM (kalau di makanan)
Ada badan pengawas badan sertifikasi keandalan

Tanda tangan elektronik memiliki kekuatan hukum dan akibat hukum yang sah
Tanda tangan digital -> berbasis publik key infrastructure atau berbasis biometric

Sertifikasi digital dapat disimpan di smart card.
Penyelenggara sertifikasi elektronik harus berbadan hukum dan berdomisili di Indonesia, kalau asing harus terdaftar di Indonesia.

RE = registration authority
Seperti notaris yang akan mengecek alamat fisik.

Transaksi elektronik harus ada perjanjian elektroniknya. Berlaku untuk publik dan privat.
Transaksi elektronik memiliki syarat : subjektif dan objektif.
Subjektif : kesepakatan, dan kecakapan
Objektif : informasi valid, sebab yang halal.

Untuk lebih jelasnya, bisa baca dokumen UU ITE yang lebih lengkap. =D

Jitter For Beginner

What is jitter? Jitter is, as shown in Figure 1, is “the short-term variations of a signal with respect to its ideal position in time.”

Figure 1. Jitter in Clock Signals

This deviation in a clock’s output transition from its ideal position can negatively impact data transmission quality. In many cases, other signal deviations, like signal skew and coupled noise are combined and labeled as jitter.

Deviation (expressed in ±ps) can occur on either the leading edge or the trailing edge of a signal. Jitter may be induced and coupled onto a clock signal from several different sources and is not uniform over all frequencies.

Excessive jitter can increase the bit error rate (BER) of a communications signal by incorrectly transmitting a data bit stream. In digital systems, jitter can lead to a violation of timing margins, causing circuits to behave improperly. Accurate measurement of jitter is necessary for ensuring the reliability of a system.

Sources of Jitter

Common sources of jitter include:

• Internal circuitry of the phase-locked loop (PLL)
• Random thermal noise from a crystal
• Other resonating devices
• Random mechanical noise from crystal vibration
• Signal transmitters
• Traces and cables
• Connectors
• Receivers

Beyond these sources, termination dependency, cross talk, reflection, proximity effects, VCC sag, ground bounce, and electromagnetic interference (EMI) from nearby devices and equipment can also increase the amount of jitter in a device.

Reflection and cross-talk frequency-dependent effects may be amplified if an adjacent signal is synchronous and in phase. Aside from noise caused by power supplies and ground, changes in circuit impedance are responsible for most of the jitter in data transmission circuits.

Jitter Components

The two major components of jitter are random jitter, and deterministic jitter.

Random Jitter

The random component in jitter is due to the noise inherent in electrical circuits and typically exhibits a Gaussian distribution. Random jitter (RJ) is due to stochastic sources, such as substrate and power supply. Electrical noise interacts with the slew rate of signals to produce timing errors at the switching points.

RJ is additive as the sum of squares, and follows a bell curve. Since random jitter is not bounded, it is characterized by its standard deviation (rms) value.

Deterministic Jitter

Deterministic jitter (DJ) is data pattern dependant jitter, attributed to a unique source. Sources are generally related to imperfections in the behavior of a device or transmission media but may also be due to power supply noise, cross-talk, or signal modulation.

DJ is linearly additive and always has a specific source. This jitter component has a non-Gaussian probability density function and is always bounded in amplitude. DJ is characterized by its bounded, peak-to-peak, value.

Types of Jitter

There are many different types of jitter. Period jitter, cycle-to-cycle jitter and half-period jitter are described below.

Period Jitter

Period jitter is the change in a clock’s output transition (typically the rising edge) from its ideal position over consecutive clock edges. Period jitter is measured and expressed in time or frequency. Period jitter measurements are used to calculate timing margins in systems, such as tSU and tCO.

Cycle-to-Cycle Jitter

Cycle-to-cycle jitter is the difference in a clock’s period from one cycle to the next. Cycle-to-cycle jitter is the most difficult to measure usually requiring a timing interval analyzer.

As shown in Figure 2, J1 and J2 are the measured jitter values. The maximum value measured over multiple cycles is the maximum cycle-to-cycle jitter.

Figure 2. Cycle-to-Cycle Jitter

Half-Period Jitter

Half-period jitter is the measure of maximum change in a clock’s output transition from its ideal position during one-half period. Figure 3 illustrates half-period jitter.

Half-period jitter impacts DDR transfer applications by reducing capture margins.

Figure 3. Half-Period Jitter

Jitter Specifications

The performance of the PLL is measured using several parameters. Three of the common specifications used to characterize the PLL are jitter generation, tolerance, and transfer.

Jitter Generation

Jitter generation is the measure of the intrinsic jitter produced by the PLL and is measured at its output. Jitter generation is measured by applying a reference signal with no jitter to the input of the PLL, and measuring its output jitter. Jitter generation is usually specified as a peak-to-peak period jitter value.

Jitter Tolerance

Jitter tolerance is a measure of the ability of a PLL to operate properly (i.e., remain in lock in the presence of jitter of various magnitudes at different frequencies) when jitter is applied to its reference. Jitter tolerance is usually specified using an input jitter mask.

Jitter Transfer

Jitter transfer or jitter attenuation refers to the magnitude of jitter at the output of a device for a given amount of jitter at the input of the device. Input jitter is applied at various amplitudes and frequencies, and output jitter is measured with various bandwidth settings. Since intrinsic jitter is always present, jitter attenuation will appear to be lower for low frequency input jitter signals than for high frequency ones. Jitter transfer is typically specified using a bandwidth plot.

References

Lecroy. 2001. Jitter & Timing Analysis Training Presentation.

http://www.altera.com/support/devices/pll_clock/jitter/pll-jitter.html